Stackable flex circuit IC package and method of making same
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United States of America Patent
Stats
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Jul 30, 2002
Issued Date -
N/A
app pub date -
Nov 3, 2000
filing date -
May 5, 1999
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A stackable flex circuit IC package includes a flex circuit comprised of a flexible base with a conductive pattern thereon, and wrapped around at least one end portion of a frame so as to expose the conductive pattern at the edge portion. An IC device is mounted within a central aperture in the frame, and is electrically coupled to the conductive pattern. The IC device is sealed in place within the frame with epoxy. A stack of the IC packages is assembled by disposing a conductive epoxy of anisotropic material between the conductive patterns at the edge portions of adjacent IC packages. Application of pressure in a vertical or Z-axis direction between adjacent IC packages completes electrical connections between the individual conductors of the conductive patterns of adjacent IC packages to interconnect the IC packages of the stack, while at the same time maintaining electrical isolation between adjacent conductors within each of the conductive patterns. The IC devices may comprise bare memory chips electrically coupled to the conductive pattern by wire bonds which are encapsulated in the epoxy together with the chip. Alternatively, where the IC devices comprise ball grid array (BGA) devices, such as chip scale packages, .mu.BGAs, flip chips, or the like, the matrix of balls or other conductive elements on the device are disposed within apertures ablated through the flexible base of the flex circuit where they are soldered to the conductive pattern. A method of making the stackable flex circuit IC package secures the frame onto the flex circuit so that the flex circuit is wrapped around at least one end of the frame, secures the IC device to the flex circuit within the opening in the frame, electrically couples the IC device to the conductive pattern on the flex circuit, either by wire bonding in the case of a bare chip or by soldering the matrix of balls or other conductive elements to the conductive pattern of the flex circuit in the case of a BGA device, and then encapsulates the device with epoxy. A stack of the IC packages is formed by placing anisotropic conductive epoxy between the exposed conductive patterns of adjacent IC packages and pressing the IC packages together.

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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
TAMIRAS PER PTE LTD LLC | 160 GREENTREE DRIVE SUITE 101 DOVER DE 19904 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Isaak, Harlan R | 2870 Chios Rd., Costa Mesa, CA 92626 | 16 | 1199 |
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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