Method of fabricating a bottom electrode

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United States of America Patent

PATENT NO 6417065
SERIAL NO

09718190

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Abstract

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A method of fabricating a bottom electrode is described. A substrate having a conductive layer therein is provided. A first dielectric layer is formed over the substrate. A conductive plug is formed through the first dielectric layer to electrically couple with the conductive layer. A cap layer is formed over the substrate to cover the conductive plug. An isolation layer is formed over the cap layer. A plurality of bit lines is formed over the isolation layer. A second dielectric layer is formed over the isolation layer. A node contact opening is formed through the second dielectric layer, the bit lines and the isolation layer to expose the cap layer. A conformal isolation layer is formed over the substrate to partially fill the contact node opening. A third dielectric layer having an opening is formed over the substrate. The opening is aligned with the node contact opening. An etching step is performed to remove a portion of the conformal isolation layer exposed by the opening and the cap layer. An isolation spacer remaining from the conformal isolation layer is formed on a sidewall of the contact node opening. A conformal conductive layer is formed in the opening and the node contact opening to make contact with the conductive plug. The third dielectric layer is removed.

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Patent Owner(s)

Patent OwnerAddress
COLTEC INDUSTRIES INCC/T CT CORPORATION SYSTEM OLIVER BLDG MELLON SQUARE PITTSBURGH PA 15222

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lin, Kun-Chi Hsinchu, TW 44 210
Wu, King-Lung Tainan Hsien, TW 25 72

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