Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture

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United States of America Patent

PATENT NO 6413802
SERIAL NO

09695532

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Abstract

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A FinFET device is fabricated using conventional planar MOSFET technology. The device is fabricated in a silicon layer overlying an insulating layer (e.g., SIMOX) with the device extending from the insulating layer as a fin. Double gates are provided over the sides of the channel to provide enhanced drive current and effectively suppress short channel effects. A plurality of channels can be provided between a source and a drain for increased current capacity. In one embodiment two transistors can be stacked in a fin to provide a CMOS transistor pair having a shared gate.

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Patent Owner(s)

Patent OwnerAddress
THE REGENTS OF THE UNIVERSITY OF CALIFORNIA1111 FRANKLIN STREET TWELFTH FLOOR OAKLAND CA 94607-5200

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bokor, Jeffrey Oakland, CA 13 921
Chang, Leland Berkeley, CA 158 4809
Choi, Yang-Kyu Albany, CA 60 1435
Hu, Chenming Alamo, CA 194 10122
Huang, Xuejue Albany, CA 2 603
Kedzierski, Jakub Tadeusz Hayward, CA 7 713
King, Tsu-Jae Fremont, CA 78 4150
Lee, Wen-Chin Beaverton, OR 142 2815
Lindert, Nick Berkeley, CA 54 2275
Subramanian, Vivek Redwood City, CA 102 7010

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