Method and structure for isolating integrated circuit components and/or semiconductor active devices

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United States of America Patent

PATENT NO 6399462
SERIAL NO

08885046

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Abstract

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A method of forming a field oxide or isolation region in a semiconductor die. A nitride layer (over an oxide layer disposed over a substrate) is patterned and subsequently etched so that the nitride layer has a nearly vertical sidewall. The oxide layer and the substrate in the isolation region are etched to form a recess in the substrate having a sloped surface with respect to the nearly vertical sidewall of the nitride layer. A field oxide is then grown in the recess using a high pressure, dry oxidizing atmosphere. The sloped sidewall of the substrate effectively moves the face of the exposed substrate away from the edge of the nitride layer sidewall. Compared to non-sloped techniques, the oxidation appears to start with a built-in offset from the patterned etch. This leads to a reduction of oxide encroachment and a nearly non-existent bird's beak. The desirable range of slopes for the substrate sidewall is approximately 50.degree.-80.degree. with respect to a nearly planar surface of the substrate in the recess.

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Patent Owner(s)

Patent OwnerAddress
MORGAN STANLEY SENIOR FUNDING INC1300 THAMES STREET 4TH FLOOR BALTIMORE MD 21231

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kim, Sang S Laguna Hills, CA 3 34
Ramkumar, Krishnaswamy San Jose, CA 191 3141
Sadoughi, Sharmin Cupertino, CA 12 76
Shelem, Avner San Jose, CA 1 2
Trammel, Pamela San Jose, CA 2 14

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