System and method for combining integrated circuit final test and marking

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United States of America Patent

PATENT NO 6396295
SERIAL NO

09088961

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A testing station tests integrated circuits and determines if the integrated circuits pass or fail predefined tests. The integrated circuits are placed in a pass bin if the integrated circuits passed the tests, or a fail bin if the integrated circuits failed the tests. A marking station marks identification information on the integrated circuits in the pass bin. The testing and marking stations are both included in a single, integrated tester-marker system.

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Patent Owner(s)

Patent OwnerAddress
INTEGRATED SILICON SOLUTION INC1623 BUCKEYE DR MILPITAS CA 95035

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bandali, Mo Los Gatos, CA 1 8
Robinson, Donald E San Jose, CA 16 2385

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