Vertical bipolar transistor, in particular with an SiGe heterojunction base, and fabrication process
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United States of America Patent
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May 7, 2002
Grant Date -
N/A
app pub date -
Oct 23, 2000
filing date -
Apr 22, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The semiconductor region of an intrinsic collector is surrounded with a lateral insulating region. A semi-conducting layer comprising a SiGe heterojunction is partially located between the transmitter and the intrinsic collector and extends on either side of the transmitter above the lateral insulating region. The base intrinsic region is formed in said semi-conducting layer with heterojunction between the transmitter and the intrinsic collector. The base extrinsic region and the collector extrinsic region respectively comprise first zones formed in said semi-conducting layer with heterojunction, located respectively on either side of the transmitter and above the lateral insulating region first part and mutually electrically insulated by the lateral insulating region second part.
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