Semiconductor device and method of manufacturing the same
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United States of America Patent
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May 7, 2002
Grant Date -
Nov 15, 2001
app pub date -
Jul 20, 2001
filing date -
May 26, 1994
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A first impurity diffusion layer forms one of source/drain regions and also forms a bit line. A first semiconductor layer, a channel semiconductor layer and a second semiconductor layer, which forms the other of source/drain regions and also forms a storage node, are disposed on the first impurity diffusion layer. A capacitor insulating film is disposed on a second conductive layer. A cell plate is disposed on a storage node with the capacitor insulating film therebetween. A capacitance of the bit line is reduced, and a dynamic random access memory thus constructed performs a high-speed operation.
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