Clock synchronous type semiconductor memory device that can switch word configuration

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United States of America Patent

PATENT NO 6377512
SERIAL NO

09666133

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Abstract

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Data buses are arranged in a one-to-one correspondence to pads. These data buses are arranged in common to a plurality of memory arrays. A read data driver is rendered active selectively according to a word configuration to switch equivalently the connection between a memory array and a data bus.

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Patent Owner(s)

Patent OwnerAddress
DRAM MEMORY TECHNOLOGIES LLC500 NEWPORT CENTER DRIVE NEWPORT BEACH CA 92660

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ariki, Takuya Hyogo, JP 25 290
Asakura, Mikio Hyogo, JP 105 2061
Hamamoto, Takeshi Hyogo, JP 120 2632
Nishiyama, Takayuki Hyogo, JP 52 426

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