High speed semiconductor memory device with short word line switching time
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 2, 2002
Grant Date -
N/A
app pub date -
Sep 1, 2000
filing date -
Sep 30, 1999
priority date (Note) -
In Force
status (Latency Note)
![]() |
A preliminary load of PAIR data current through [] has been loaded. Any more recent PAIR data will be loaded within twenty-four hours. |
PAIR data current through []
A preliminary load of cached data will be loaded soon.
Any more recent PAIR data will be loaded within twenty-four hours.
![]() |
Next PAIR Update Scheduled on [ ] |

Importance

US Family Size
|
Non-US Coverage
|
Patent Longevity
|
Forward Citations
|
Abstract
Setting means (such as fuse circuits) for adjusting the timings of various signals such as an activation timing of a sense amplifier, a fall timing of a word line, a recovery operation (equalization) of a bit lines and so forth, checking an operation in a test stage of a chip, and permanently programming (fixing) the timing of an internal signal to the condition of the highest operation speed that can be confirmed as acquirable in this check stage, is provided.
First Claim
all claims..Other Claims data not available
Family
Country | kind | publication No. | Filing Date | Type | Sub-Type |
---|---|---|---|---|---|
JP | A | JP2001101868 | Sep 30, 1999 | Patent | Application |
Type : Patent Sub-Type : Application | |||||
Published unexamined patent application | SEMICONDUCTOR MEMORY | Apr 13, 2001 | |||
TW | B | TWI235377 | Sep 04, 2000 | Patent | Grant |
Type : Patent Sub-Type : Grant | |||||
GRANTED PATENT OR PATENT OF ADDITION | Semiconductor memory device | Jul 01, 2005 | |||
KR | A | KR20010070098 | Sep 23, 2000 | Patent | Application |
Type : Patent Sub-Type : Application | |||||
UNEXAMINED PATENT APPLICATION | 반도체 기억장치 | Jul 25, 2001 | |||
US | B2 | US6538933 | Jan 03, 2002 | Patent | Grant |
Type : Patent Sub-Type : Grant | |||||
GRANTED PATENT AS SECOND PUBLICATION | High speed semiconductor memory device with short word line switching time | Mar 25, 2003 |
- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
VACHELLIA LLC | 500 NEWPORT CENTER DRIVE 7TH FLOOR NEWPORT BEACH CA 92660 |
International Classification(s)

- 2000 Application Filing Year
- G11C Class
- 2416 Applications Filed
- 1639 Patents Issued To-Date
- 67.84 % Issued To-Date
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Akioka, Takashi | Akishima, JP | 40 | 637 |
# of filed Patents : 40 Total Citations : 637 | |||
Shinozaki, Masao | Higashimurayama, JP | 24 | 328 |
# of filed Patents : 24 Total Citations : 328 |
Cited Art Landscape
- No Cited Art to Display

Patent Citation Ranking
- 9 Citation Count
- G11C Class
- 2.28 % this patent is cited more than
- 23 Age
Forward Cite Landscape
- No Forward Cites to Display

Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
---|
Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
Full Text

Legal Events
- No Legal Status data available.

Matter Detail

Renewals Detail
