Method of operating flash memory
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United States of America Patent
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Apr 2, 2002
Issued Date -
N/A
app pub date -
Oct 10, 2000
filing date -
May 30, 1996
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Abstract
A method of programming an electrically programmable memory cell which cell includes a transistor formed in a semiconductor substrate of first conductivity type having a surface a first well region of second conductivity type is disposed in the substrate adjacent the surface thereof. A second well region of first conductivity type is disposed in the first well region adjacent the surface. The transistor has a source region, a drain region, a floating gate, and a control gate. The method includes raising the control gate to a first selected potential no greater than 9.0 volts, raising the drain to a potential to no more than 5.0 volts, coupling the source region to ground potential, coupling the first well region of second conductivity type to ground potential, and placing the second well region at a potential below ground potential.
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