Polyimide/silicon oxide bi-layer for bond pad parasitic capacitance control in semiconductor electro-optical device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6365968
SERIAL NO

09130742

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An electro-optical, ridge-waveguide device and method for its fabrication utilizes a polyimide ridge-protection layer, which provides good ridge protection/planarization while minimizing parasitic capacitance. A silicon oxide interlayer is used between a metal contact layer and the polyimide. This interlayer facilitates the adhesion between the metal contact layer and the underlying device since good adhesion can be obtained between the silicon oxide layer and the polyimide layer and between the metal layer and silicon oxide layer. Preferably, the polyimide is roughened to increase the surface area contact between the polyimide layer and silicon oxide layer to further increase adhesion and thus the pull-off force required to separate the metal contact layer from the device. While such roughening can be achieved through plasma etching, in a preferred embodiment, the polyimide layer is roughened by patterned etching. Specifically, a patterned photoresist is used as a etch-protection layer to form a series of wells in the polyimide layer that have a pitch between 1 and 20 microns.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • CORNING LASERTRON, INC.;THORLABS QUANTUM ELECTRONICS, INC.

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lu, Hanh Lexington, MA 4 70
Qian, Yi Lowell, MA 40 648
Sahara, Richard Watertown, MA 3 26

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation