Semiconductor memory device including sense amplifier circuit differing in drivability between data write mode and data read mode
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 26, 2002
Issued Date -
N/A
app pub date -
Jan 24, 2001
filing date -
Dec 25, 1998
priority date (Note) -
In Force
status (Latency Note)
Importance
Loading Importance Indicators... 
Abstract
For a semiconductor memory device having a global data bus, a memory array and internal data write circuitry between the bus and array. The internal data write circuitry has a data mask current that inhibits writing of data into selected memory cells in accordance with a data mask designating signal.
Loading the Abstract Image...
OK
First Claim
Family
Loading Family data...
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully