Electrode for semiconductor device and method for manufacturing same
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
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Feb 19, 2002
Issued Date -
N/A
app pub date -
Jan 14, 2000
filing date -
Apr 28, 1994
priority date (Note) -
In Force
status (Latency Note)
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Abstract
The purpose of the present invention is to obtain an electrode wiring structure for semiconductor devices that can suppress the occurrence of Al voids inside aluminum alloy wiring without regard to the orientation of such aluminum alloy wiring. An interlayer insulator film 11, a titanium layer 12, a titanium nitride layer 13 that serves as the barrier layer, an aluminum alloy wiring layer 15 and a protective film 18 are formed on top of the silicon substrate 10 to compose the electrode structure. In this case, a distortion relaxation layer 14, with a film thickness of approximately over 10 nm and which is an intermetallic compound that includes aluminum and titanium in its composition, is formed in between the titanium nitride layer 13 and the aluminum alloy wiring layer 15. Because of this distortion relaxation layer, for every wiring width of 1 .mu.m, the number of Al voids with widths of over 0.3 .mu.m is practically reduced to 0.
First Claim
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Family

- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
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NIPPONDENSO CO LTD | 1-1 SHOWA-CHO KARIYA-CITY AICHI-PREF 448 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Isobe, Yoshihiko | Toyoake, JP | 27 | 381 |
# of filed Patents : 27 Total Citations : 381 | |||
Komura, Atsushi | Obu, JP | 23 | 318 |
# of filed Patents : 23 Total Citations : 318 | |||
Yamane, Hiroyuki | Anjo, JP | 13 | 150 |
# of filed Patents : 13 Total Citations : 150 | |||
Yamaoka, Tooru | Toyohashi, JP | 4 | 37 |
# of filed Patents : 4 Total Citations : 37 | |||
Yamauchi, Takeshi | Nagoya, JP | 56 | 914 |
# of filed Patents : 56 Total Citations : 914 |
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Patent Citation Ranking
- 6 Citation Count
- H01L Class
- 1.35 % this patent is cited more than
- 23 Age
Forward Cite Landscape
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
Full Text

Legal Events
Date | Code | Event | Description |
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Dec 16, 2024 | LAPS | LAPSE FOR FAILURE TO PAY MAINTENANCE FEES | free format text: PATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
Dec 16, 2024 | STCH | INFORMATION ON STATUS: PATENT DISCONTINUATION | free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
Nov 08, 2024 | FP | LAPSED DUE TO FAILURE TO PAY MAINTENANCE FEE | Effective Date: Nov 08, 2024 |
Apr 21, 2020 | MAFP | MAINTENANCE FEE PAYMENT | free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY year of fee payment: 4 |
Nov 08, 2016 | I | Issuance | |
Oct 19, 2016 | STCF | INFORMATION ON STATUS: PATENT GRANT | free format text: PATENTED CASE |
Jul 13, 2016 | AS | ASSIGNMENT | free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:WUESTENBECKER, MICHAEL;REEL/FRAME:039147/0123 Owner name: GE SENSING & INSPECTION TECHNOLOGIES GMBH, GERMANY Effective Date: Jul 13, 2016 |
Nov 19, 2015 | P | Published | |
Dec 18, 2013 | F | Filing | |
Dec 24, 2012 | PD | Priority Date |

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