Pulse latch with explicit, logic-enabled one-shot
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United States of America Patent
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-
Dec 4, 2001
Grant Date -
N/A
app pub date -
Oct 14, 1999
filing date -
Oct 14, 1999
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
CMOS integrated circuitry responsive to a clock source having an approximately 50% duty cycle includes a one shot having an input terminal connected to be responsive to the clock wave source. The one shot derives a pulse train in response to cycles of the clock. Each pulse in the pulse train has a duration substantially less than one-half cycle of the clock wave, is initiated in response to and during a clock wave transition, and persists for a period after the transition has been completed. Latches respond to plural data signals and the pulse train so each latch is activated to be responsive to its associated data signal only during the pulses.
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