Ultrathin, nitrogen-containing MOSFET sidewall spacers using low-temperature semiconductor fabrication process

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United States of America Patent

PATENT NO 6323519
SERIAL NO

09177871

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Abstract

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A transistor and a method for making a transistor are described. A gate conductor is patterned over a gate dielectric upon a semiconductor substrate. Dopant impurity distributions self-aligned to the gate conductor may be introduced. A conformal oxide having thickness between about 100 angstroms and 500 angstroms is deposited over the gate conductor and substrate. The oxide is exposed to a nitrogen-bearing plasma for conversion to nitrided oxide. Anisotropic etching may then be used to form ultrathin, nitrided oxide spacers. Introduction of a second dopant impurity distribution may be performed to create source-drain regions having narrow LDD regions, and resulting decreased series resistance and increased saturated drain current. Thicker spacers or spacers combining oxide and nitrided oxide portions may firther be formed by repeated deposition of thin conformal oxides. The presence of nitrogen in nitrided oxide portions of the spacers is believed to help prevent dopant outdiffusion from adjacent silicon, prevent silicide bridging across spacers, and increase resistance of the spacers to oxide etchants.

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Patent Owner(s)

Patent OwnerAddress
LONE STAR SILICON INNOVATIONS LLC5204 BLUEWATER DR FRISCO TX 75034

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gardner, Mark I Cedar Creek, TX 677 11091
May, Charles E Austin, TX 118 2229
Wristers, Derick J Austin, TX 140 3118

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