Apparatus and method for testing electric conductivity of circuit path ways on circuit board

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United States of America Patent

PATENT NO 6316949
SERIAL NO

09484415

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Abstract

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A testing apparatus and method for testing conductivity of electric pathways formed on a substrate, each pathway including a first wiring and a second wiring partially overlapping each other. The apparatus includes a first electric signal applier for applying a first electric signal having an electric parameter changing with time to an input portion of the first wiring, a first electrode facing a first portion of the second wiring, a second electrode facing a second portion of the second wiring, a second electric signal applier for applying to the second a electrode a second electric signal changing its electric parameter in the phase reverse to that of the first electric signal, and a monitor for monitoring the signal transmitted to the first electrode through its capacitive coupling.

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Patent Owner(s)

Patent OwnerAddress
NIHON DENSAN READ KABUSHIKI KAISHA (NIDEC-READ CORPORATION)NISHIKYOGOKU UKYO-KU KYOTO-SHI KYOTO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yamashita, Munehiro Sakurai, JP 9 48

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