Semiconductor package with a stacked chip on a leadframe
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United States of America Patent
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Oct 23, 2001
Grant Date -
N/A
app pub date -
Oct 26, 1998
filing date -
Oct 26, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention provides a leadframe package formed by flip chip on leadframe technique. The chips are face to face attached on both sides of the leadframe surface. Another embodiment according to the present invention is that the chips are back to back attached on a leadframe. A chip with smaller size is stacked on a further chip with larger size. The smaller chip is connected to the leadframe by wire bonding. The present invention includes a first chip attached on the leadframe by using flip chip technology. The first chip has a plurality of conductive bump for electrically transferring signal to external. The tape has a plurality of openings or slots through the tape. Each opening exposes the terminal of the inner leads. Thus, a further chip can be set on the opposite major surface of the leadframe by means of the openings or slots. The second chip can be optionally face to face formed on the other side of the leadframe or back to back stacked on the first chip. The second chip is connected to the leadframe by wire bounding under this structure.
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