Data monitor circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6289470
SERIAL NO

09192593

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Abstract

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Address information that is desired to be monitored of a data storage memory is stored in a data memory address buffer 110, and while a program is being executed the stored address information and address information transferred to a bus are compared. If there is coincidence between the stored address information and the address information transferred to the bus, data that has been transferred to the bus (data that has been read or written based on coincident address information) can be reliably output to the outside. As a result, it is possible to reliably carry out defect analysis for a data storage memory while a program is being executed.

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Patent Owner(s)

Patent OwnerAddress
LAPIS SEMICONDUCTOR CO LTD2-4-8 SHINYOKOHAMA KOUHOKU-KU YOKOHAMA-SHI KANAGAWA 222-8575

International Classification(s)

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  • 1998 Application Filing Year
  • G06F Class
  • 14242 Applications Filed
  • 9450 Patents Issued To-Date
  • 66.36 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances1998199920002001200220032004200520062007200820092010201120122013201420150255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tanaka, Toshiyuki Tokyo, JP 304 4921

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Patent Citation Ranking

  • 6 Citation Count
  • G06F Class
  • 0.86 % this patent is cited more than
  • 24 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges1552641424014610265523432229501 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +0255075100125150175200225250275300325350375400425450475500525550575

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