Insulated gate semiconductor device and method of manufacturing the same
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United States of America Patent
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Sep 4, 2001
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N/A
app pub date -
Feb 28, 2000
filing date -
Aug 29, 1997
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Abstract
The present invention relates to an insulated gate semiconductor device and a method of manufacturing the same, and more particularly to an improvement for enhancing a gate breakdown voltage. In order to achieve the object, gate wirings (9), (10) and (13) are provided to keep away from an upper end (UE) of an edge of a gate trench (6) along its longitudinal direction. More specifically, the gate wiring (9) coupled integrally with an upper surface of a gate electrode (7) is formed apart from the upper end (UE) and the gate wiring (10) is formed on an insulating film (4) also apart from the upper end (UE). The two gate wirings (9) and (10) are connected to each other through the gate wiring (13) formed on a BPSG layer (11). Moreover, an upper face of the gate electrode (7) is positioned on the same level as an upper main surface of a semiconductor substrate (90) or therebelow in the vicinity of the upper end (UE). Consequently, a concentration of an electric field generated in insulating films (8) and (17) covering the upper end (UE) can be relieved or eliminated.
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