ATM switch system employing an efficient clock pulse division technique
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United States of America Patent
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Aug 28, 2001
Grant Date -
N/A
app pub date -
Oct 30, 1998
filing date -
Dec 31, 1997
priority date (Note) -
Expired
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Abstract
An asynchronous transfer mode (ATM) switch system generates a divided clock pulse to be used in converting ATM cells into data of unit of a predetermined bit length. In the system, a clock pulse and a plurality of cell synchronization signals with different phases are obtained first. Based on the clock pulse and the cell synchronization signals, a selection control signal and a reset signal are issued. In response to the selection control signal, one of the cell synchronization signals is selected. An initialization control signal is derived in accordance with the selected one cell synchronization signal and the reset signal. In response to the initialization control signal, the divided clock pulse is obtained based on a previous divided clock pulse to generate the divided clock pulse.
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