Memory device with multiple processors having parallel access to the same memory area
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United States of America Patent
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Aug 21, 2001
Issued Date -
N/A
app pub date -
Mar 25, 1999
filing date -
Oct 18, 1990
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A digital computer performs read-modify-write (RMW) processing on each bit of a row of memory in parallel, in one operation cycle, comprising: (a) addressing a memory, (b) reading each bit of a row of data from the memory in parallel, (c) performing the same computational operation on each bit of the data in parallel, using an arithmetic logic unit (ALU) in a dedicated processing element, and (d) writing the result of the operation back into the original memory location for each bit in the row.
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