Power factor correction control circuit for regulating the current waveshape in a switching power supply
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United States of America Patent
Stats
-
Aug 14, 2001
Grant Date -
N/A
app pub date -
Jun 27, 2000
filing date -
Jun 27, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A switching power supply comprises an AC rectifier adapted to receive an AC line voltage and provide an input voltage (V.sub.IN) therefrom having a haversine waveform. A switching power converter is connected to the AC rectifier and provides a DC output voltage (V.sub.OUT) for a load. The switching power converter comprises an inductor and a power switch adapted to control current in the inductor. A pulse width modulator provides a drive signal to the power switch having a variable duty cycle to regulate current provided to the load by the switching power converter. A power factor correction circuit is adapted to control operation of the pulse width modulator so that a waveshape of the current from the AC rectifier matches the output voltage (V.sub.OUT) with changes in the input voltage (V.sub.IN) and load. More particularly, the power factor correction circuit further comprises a voltage error circuit providing a voltage error signal corresponding to a difference between the output voltage (V.sub.OUT) and a reference voltage, a differential amplifier circuit generating a current program signal based in part on the voltage error signal, including an amplifier circuit to amplify a scaled input voltage (V.sub.IN) signal with gain determined by the voltage error signal, and a current error circuit controlling the pulse width modulator based on the current program signal and a current sense signal corresponding to the current from the AC rectifier. The amplifier circuit further comprises a field effect transistor (FET) biased in a saturation condition to thereby provide a resistance that varies in accordance with the voltage error signal. The gain of the amplifier circuit is determined by the resistance. The differential amplifier circuit further comprises a second amplifier circuit adapted to amplify a difference between the scaled input voltage (V.sub.IN) signal and the amplified scaled input voltage (V.sub.IN) signal from the first amplifier circuit.

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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
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POWER-ONE INC | 740 CALLE PLANO CAMARILLO CA 93012 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
McClain, Edward L | Los Angeles, CA | 2 | 130 |
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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