Circuit for integrating light-induced charges with improved linearity
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United States of America Patent
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Jul 24, 2001
Grant Date -
N/A
app pub date -
Aug 9, 1999
filing date -
Feb 7, 1997
priority date (Note) -
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Abstract
An integrator circuit for photogenerated charges which limits linearity defects. The circuit includes an integration capacitor with a first blade connected to a reference potential and a second blade having a variable potential which receives photogenerated charges. The circuit also includes a resetting MOS transistor of a first type connected to the variable potential at one terminal and to a supply potential on another. The MOS transistor represents a straight capacitance in parallel with the integration capacitor. One or more MOS transistors of a second type are connected to the variable potential and each have a stray capacitance in parallel with the integration capacitor. A variation in the voltage across the terminals of the integration capacitor causes a variation in the value of the straight capacitances of the MOS transistors of the second type which tends to compensate for the variation in the stray capacitance of the MOS transistor of the first type.
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