Process of operating a microprocessor to use wait state numbers

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United States of America Patent

PATENT NO 6263418
SERIAL NO

09430909

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Abstract

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A data processing device is used with peripheral devices having addresses and differing communication response periods. The data processing device includes a digital processor adapted for selecting different ones of the peripheral devices by asserting addresses of each selected peripheral device. Addressable programmable registers hold wait state values representative of distinct numbers of wait states corresponding to different address ranges. Circuitry responsive to an asserted address to the peripheral devices asserted by the digital processor generates the number of wait states represented by the value held in one of the addressable programmable registers corresponding to the one of the address ranges in which the asserted address occurs, thereby accommodating the differing communication response periods of the peripheral devices.

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Patent Owner(s)

Patent OwnerAddress
ADIR ET COMPAGNIECOURBEVOIE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Boutaud, Frederic Roquefort les Pihs, FR 69 2021
Ehlig, Peter N Houston, TX 46 2052

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