System architecture for and method of processing packets and/or cells in a common switch
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United States of America Patent
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Jul 10, 2001
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N/A
app pub date -
Dec 30, 1997
filing date -
Dec 30, 1997
priority date (Note) -
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Abstract
A novel networking architecture and technique for transmitting both cells and packets or frames across a common switch fabric, effected, at least in part, by utilizing a common set of algorithms for the forwarding engine (the ingress side) and a common set of algorithms for the QoS management (the egress part) that are provided for each I/O module to process packet/cell information without impacting the correct operation of ATM switching and without transforming packets into cells for transfer across the switch fabric.
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