Compensation process for a disturbed capacitive circuit and application to matrix display screens
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United States of America Patent
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Jun 26, 2001
Grant Date -
N/A
app pub date -
Jun 2, 1998
filing date -
Jun 5, 1997
priority date (Note) -
Expired
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Abstract
A compensation process for a circuit comprising at least one first conductor at a specified potential, at least one second conductor generating disturbances by capacitive coupling to the conductor and at least one disturbance compensation bus capacitively coupled to the first conductor by a first capacitor includes the steps of measuring the voltage and the current on the compensation bus, calculating the voltage on the first disturbed conductor, and determining the set-point voltage to be applied to the compensation bus in order to compensate for the disturbance.
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