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Abstract

In a method of manufacturing a semiconductor device comprising a field-effect transistor and a non-volatile memory element at a surface of a semiconductor body, a first and a second active region of a first conductivity type are defined at the surface of the semiconductor body for the transistor and the memory element, respectively. The surface of the semiconductor body is subsequently coated with a first insulating layer providing a sacrificial gate dielectric of the transistor and a floating gate dielectric of the memory element, which first insulating layer is then covered by a silicon-containing layer providing a sacrificial gate of the transistor and a floating gate of the memory element. After formation of the sacrificial gate and the floating gate, the transistor and the memory element are provided with source and drain zones of a second conductivity type. In a next step, a dielectric layer is applied, which is removed over at least part of its thickness by means of a material removing treatment until the silicon-containing layer at the first and the second active region and is exposed, after which the silicon-containing first active region are removed, thereby forming a recess in the dielectric layer. Subsequently, a second insulating layer is applied at the second active region providing an inter-gate dielectric of the memory element, and a third insulating layer is applied at the first active region providing a gate dielectric of the transistor. After formation of the gate dielectric and the inter-gate dielectric, a conductive layer is applied which is shaped into a gate of the transistor at the first active region and a control gate of the memory element at the second active region.

First Claim