Multi-chip chip scale package
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United States of America Patent
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May 29, 2001
Grant Date -
N/A
app pub date -
Feb 1, 1999
filing date -
Jan 29, 1999
priority date (Note) -
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Abstract
A multi-chip chip scale package. The package has a film carrier whereby two chips with different sizes can be disposed on the same film carrier. A flip chip technique is used to arrange each chip on each side of the film carrier face to face. A bump is formed on each chip to electrically connect with the film carrier. An insulation material is filled in between the chips to leave one side of each chip exposed. The conductive wires of the film carrier are connected to the chips directly.
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