Low noise low distortion class D amplifier
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United States of America Patent
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-
May 15, 2001
Grant Date -
N/A
app pub date -
Nov 10, 1999
filing date -
Nov 18, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
The low jitter dead time circuit which uses one RC combination to set the turn on delay for both the upper and lower MOSFETs in the half bridge. This circuit minimized jitters in the turn on delay and results in matched turn on delays for both MOSFETs in a half bridge. This minimizes noise and distortion. This circuit is further designed to be used in conjunction with shunt regulators to reject ripple from the power supplies.
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