DMOS device structure, and related manufacturing process

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United States of America Patent

PATENT NO 6218228
SERIAL NO

08856261

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Abstract

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A DMOS device structure includes a lightly doped semiconductor layer of a first conductivity type, a plurality of lightly doped semiconductor regions of a second conductivity type extending from a top surface of the lightly doped semiconductor layer thereinto, source regions of the first conductivity type contained in the lightly doped semiconductor regions and defining channel regions. The lightly doped semiconductor regions are contained in respective enhancement regions of the lightly doped semiconductor layer of the same conductivity type as, but with a lower resistivity than, the lightly doped semiconductor layer.

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Patent Owner(s)

Patent OwnerAddress
CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO95121 CATANIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Zambrano, Raffaele San Giovanni La Punta, IT 75 635

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