Area array stud bump flip chip device and assembly process
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United States of America Patent
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Apr 10, 2001
Grant Date -
N/A
app pub date -
Nov 4, 1998
filing date -
Nov 21, 1997
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An area array flip chip device produced using wire bonding technology. The design and process for producing such a flip chip involves stud bumps which are bonded on the substrate, to give good electrical interconnections between the chip pads and the substrate pads. This completely eliminates the limitation of not being able to have stud bump interconnections over the active area of the chip, and allows the stud bump interconnection method to be applied over the entire chip area. The design and process can also be applied to the joining of a substrate or first level packaging to the board. In this embodiment, the stud bump process acts as a replacement for the BGA process.
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