State machine with a dynamic clock gating function
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United States of America Patent
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Mar 13, 2001
Grant Date -
N/A
app pub date -
Nov 5, 1998
filing date -
Jul 29, 1998
priority date (Note) -
Expired
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Abstract
A state machine with a dynamic clock gating function according to the invention is disclosed. In the state machine, a gating clock control logic is used to gate a clock signal input to flip-flops which do not need a clock sample input. Accordingly, the total capacitance of capacitors which are charged/discharged following the state transition of a clock signal is greatly reduced, thereby decreasing the power consumption of the state machine.
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