Dielectric device, dielectric memory and method of fabricating the same

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United States of America Patent

PATENT NO 6194752
SERIAL NO

09094592

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A gate insulating layer and a first lower electrode are formed on a channel region of a silicon substrate, and an interlayer insulating film is formed on the silicon substrate so as to cover the first lower electrode and the gate insulating film. A buffer layer is formed on the interlayer insulating film, and a contact hole is formed in the interlayer insulating film and the buffer layer on the first lower electrode. A connecting layer and a second lower electrode are formed in the contact hole. A ferroelectric thin film and an upper electrode are formed in this order on the buffer layer so as to be brought into contact with the upper surface of the second lower electrode.

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Patent Owner(s)

Patent OwnerAddress
FOOTHILLS IP LLC2465 S MADISON ST DENVER CO 80210

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Furukawa, Hiroaki Gifu-ken, JP 51 316
Goto, Takashi Oogaki, JP 200 1735
Gueshi, Tatsuro Hikone, JP 1 16
Harada, Mitsuaki Oogaki, JP 22 283
Ishizuka, Yoshiyuki Inazawa, JP 12 129
Ogasahara, Satoru Gifu-ken, JP 17 132

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