Adjustable level shifter circuits for analog or multilevel memories
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United States of America Patent
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Feb 6, 2001
Grant Date -
N/A
app pub date -
Jun 29, 1999
filing date -
Jun 30, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Level shifter circuits are used to configure analog or multilevel memory cells. A level shifter circuit generates an output voltage that is above the input voltage by an offset voltage value. The magnitude of this offset voltage or the relationship between the input and output voltages of the level shifter is adjustable or programmably selectable. Adjustments can be made after the integrated circuits is fabricated and packaged. Adjustments are made by configuring bits of data in the integrated circuit to indicate the offset voltage or other parameters. These configuration bits are implemented using latches, flip-flops, registers, memory cells, or other storage circuits.
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