Signal compressing circuit
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United States of America Patent
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-
Jan 2, 2001
Grant Date -
N/A
app pub date -
Mar 9, 1998
filing date -
Sep 6, 1997
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention relates to a signal compressing circuit which amplifies an input signal on a logarithmic scale in an appropriate range, and has a variable gain stage, an input signal detector, and an automatic level controlling circuit, the automatic level controlling circuit including: a first comparator for comparing the input signal to a first reference voltage, and generating a signal proportional to the difference between them; a second comparator for comparing the input signal to a second reference voltage, and generating a signal proportional to the difference between them; and a current mirror for generating a controlling current in proportion to the output signal of the first and second comparators, thus controlling the gain of the variable gain stage in two steps so as to generate stable output signals.
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