Microprocessor having fuse control and selection of clock multiplier
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United States of America Patent
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Dec 12, 2000
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N/A
app pub date -
Nov 17, 1998
filing date -
Nov 17, 1998
priority date (Note) -
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Abstract
A microprocessor is provided having selective control features to determine its core-to-bus clock ratio. The microprocessor includes a fuse and buffer/control logic. The fuse, fabricated on the microprocessor's metalization or poly layer, can be blown with a laser during fabrication. When blown, the fuse provides a permanent state that prescribes a fixed core-to-bus clock ratio. The buffer/control logic is coupled to the fuse. The buffer/control logic accepts the permanent state and directs the microprocessor to set the core-to-bus clock ratio to a fix value, thus disabling control of the core-to-bus clock ratio via external clock ratio control signals.
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