Operational amplifier output stage
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United States of America Patent
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-
Dec 12, 2000
Grant Date -
N/A
app pub date -
Apr 16, 1999
filing date -
Apr 16, 1999
priority date (Note) -
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Abstract
The present invention is directed to a buffer stage for buffering and isolating a signal source from an external load. The stage has a signal input terminal for receiving an input signal from said signal source and a signal output terminal for providing an output signal, corresponding to said input signal, to the external load. The stage comprises an input section including at least two driver transistors each arranged so as to operate with a predetermined bias current. The stage further comprises an output section including at least two output transistors each arranged so as to operate with a predetermined quiescent current, and a voltage source, coupled to the input and output sections and constructed and arranged so as to set the quiescent currents flowing through the output transistors substantially independent of the size of the bias current flowing through the driver transistors.
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