Local oscillator noise rejection circuit
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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-
Dec 5, 2000
Grant Date -
N/A
app pub date -
May 4, 1998
filing date -
May 18, 1995
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A local oscillator noise rejection circuit is described which has a resistance between the output of an MES FET/HEMT and ground. This resistance has the effect of introducing a self-biasing arrangement to the oscillator circuit which means that when there is any increase in current through the MES PET/HEMT device, the voltage drop across the resistance also increases. Since the gate is tied to ground via a low resistance (51 .OMEGA.) this leads to an increased negative gate to source voltage which causes the device to 'pinch-off' slightly which, in turn, gives a reduction in the current level through the device. This arrangement therefore has the effect of reducing any current surges within the device and produces an improvement in phase noise. In a preferred arrangement a 30 Ohm resistor is located between the source of the FET/HEMT and ground, the resistor being located in series within the printed circuit inductor and the output line. With the aforementioned modified circuit, an improvement in the phase noise performance has been measured from the standard circuit which gave a figure of -64 dBc. At 10 KHz. After modification using the above mentioned circuit a figure of -76 dBc. At 10 KHz. was obtained which is approximately a 16 times improvement.
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