Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same
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United States of America Patent
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-
Oct 3, 2000
Issued Date -
N/A
app pub date -
Oct 3, 1997
filing date -
Mar 20, 1989
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions. The disclosed process includes forming insulating films over wiring lines including uppermost wiring lines, the uppermost wiring lines having gaps between adjacent uppermost wiring lines. The insulating films include forming a silicon oxide film over the wiring lines and in the gaps between adjacent uppermost wiring lines, and forming a silicon nitride film over the silicon oxide film, the silicon nitride film being formed by plasma chemical vapor deposition. The silicon oxide film is formed to have a thickness of at least one-half of the gap between adjacent uppermost wiring lines, with the silicon nitride film being thicker than the silicon oxide film.
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