DRAM with reduced electric power consumption
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United States of America Patent
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Aug 1, 2000
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N/A
app pub date -
Nov 10, 1998
filing date -
Sep 20, 1993
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Abstract
A DRAM (Dynamic Random Access Memory) having a plurality of memory cells includes a data read/write circuit reading or writing data for the memory cells, a self-refresh circuit refreshing data stored in the memory cells, and a power supply unit for supplying electric power to the data read/write circuit and the self-refresh circuit, the electric power having a first voltage level in a normal operation mode and a second voltage level in a self-refresh mode, wherein the second voltage level is lower than the first voltage level.
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