Design propagation delay measurement device
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Jul 4, 2000
Grant Date -
N/A
app pub date -
Oct 8, 1998
filing date -
Oct 8, 1998
priority date (Note) -
Expired
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Abstract
A semiconductor integrated circuit comprises a substrate including a plurality of transistors, and a conductive line for coupling at least two of the transistors with each other, each transistor comprising a drain diffusion region, a source diffusion region, a gate region, and a test diffusion region within the substrate, the test diffusion region being electrically coupled to a metal line within the semiconductor integrated circuit for establishing an indication of the voltage at the probing diffusion region.
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