Interconnecting structure for semiconductor integrated circuits and method

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United States of America Patent

PATENT NO 6066895
SERIAL NO

08539783

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Abstract

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An interconnecting structure for a semiconductor integrated circuit and a method for manufacturing said interconnecting structure. The interconnecting structure comprises a top layer, a bottom layer, and a dielectric isolation layer. The top layer completely covers and encloses the bottom layer. The dielectric isolation layer is disposed between the top layer and the bottom layer. At least one contact opening is formed through the top layer of the structure, thereby exposing a selected region of said bottom layer. A contact is formed on the selected region of the bottom layer.

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Patent Owner(s)

Patent OwnerAddress
MICRONAS INTERMETALL GMBH79108 FREIBURG

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Zimmer, Hans-Gunter Denzlingen, DE 2 7

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