ATM cell receiver system with source clock recovery
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United States of America Patent
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May 9, 2000
Grant Date -
N/A
app pub date -
Dec 3, 1996
filing date -
Dec 14, 1995
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A cell disassemble circuit in a cell receiver system detects the number of lost cells from information for detecting cell loss included in received cells, and separates a payload from a header in each of the received cells. The number of lost cells indicates the number of cells lost on a transmission path from the transmission side to the cell receiver system. A buffer stores the number of detected lost cells and data inserted in the payloads. A phase locked loop recovers a source clock corresponding to the rate of fixed rate information based on a use level of the buffer. A counter circuit generates a clock for reading data from the first buffer from the recovered source clock. Also, the counter circuit stops outputting the read clock to the buffer for a time period corresponding to the number of lost cells.
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