Method and structure for packaging an integrated circuit with readily removed excess encapsulant on degating region
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United States of America Patent
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May 2, 2000
Grant Date -
N/A
app pub date -
Mar 17, 1998
filing date -
Mar 17, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and structure for packaging an integrated circuit with an encapsulant to be readily peeled away from a degating region is disclosed. By applying an additional processing operation before a solder mask is coated over the substrate or during a process for forming the solder mask, an adhesion between the solder mask and the encapsulant is altered to become weaker than the adhesion between the solder mask and the substrate so that the excess encapsulant can be easily peeled away from the degating region without damaging the substrate.
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