Data processor with multiple register queues
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United States of America Patent
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-
Apr 11, 2000
Grant Date -
N/A
app pub date -
Dec 23, 1993
filing date -
Dec 29, 1992
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A data processor includes a register group having registers of the number larger than the number of registers which can be designated by a register specifier field of an instruction. The register group consists of a plurality of register queues with respect to logical register numbers designated in the instruction, each register queue including a plurality of physical registers. In the data processor, a physical register number forming section is provided for converting the logical register number to a physical register number in the register queue corresponding to the logical register number, by using queue control information designated in the register specifier field and read/write information decided by the kind of the instruction and the position of the register specifier field in the instruction.
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