Method and apparatus for failsafing and extending range for write precompensation
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United States of America Patent
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Mar 28, 2000
Issued Date -
N/A
app pub date -
Nov 10, 1997
filing date -
May 20, 1996
priority date (Note) -
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Abstract
The present invention prevents catastrophic failures of a write precompensation circuit from occurring without limiting the precompensation range to a small value and also extends the range of precompensation beyond limits imposed by the duty cycle of the clock signal. The present invention prevents catastrophic failure of the write precompensation circuit by ORing either the input or the output of the comparator and the opposite phase of the clock. The 180 degree delayed clock forces any transitions that would otherwise have been missed. The present invention extends the range of a write precompensation circuit by ORing the clock and the dock delayed by a time td. The extended duty cycle that results is used to generate a longer precompensation delay. A technique is also provided to maintain constant duty cycle over a broad range of data rates.
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