Methods of forming trench-gate semiconductor devices using sidewall implantation techniques to control threshold voltage

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United States of America Patent

PATENT NO 6040212
SERIAL NO

08833403

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Abstract

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Methods of forming trench-gate semiconductor devices using sidewall implantation techniques include the steps of forming a semiconductor substrate containing a trench-gate semiconductor device therein (e.g., MOSFET, IGBT) and then implanting dopants of predetermined conductivity type into a sidewall of the trench to adjust the threshold voltage of the semiconductor device. In particular, a method is provided which comprises the steps of forming a semiconductor substrate containing a trench therein at a first face thereof, a body region of second conductivity type (e.g., P-type) extending adjacent a sidewall of the trench and a source region of first conductivity type in the body region and extending adjacent a sidewall of the trench and adjacent the first face. An electrically insulating region (e.g., SiO.sub.2) is also formed on a sidewall of the trench and an electrically conductive region is formed in the trench. To adjust the threshold voltage of the semiconductor device, dopants of first conductivity type are implanted through the electrically insulating region and through the sidewall of the trench and into the source region of first conductivity type. Preferably, these implanted dopants are diffused into the channel region of the semiconductor device during subsequent thermal treatment steps to adjust the threshold voltage of the semiconductor device to preferred levels.

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Patent Owner(s)

Patent OwnerAddress
FAIRCHILD KOREA SEMICONDUCTOR LTD82-3 DODANG-DONG WONMI-KU BUCHEON-SI KYUNGKI-DO 420-711

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kim, Hyun-Chul Kyungki-do, KR 122 674

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