Semiconductor integrated circuit device having stacked wiring and insulating layers
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United States of America Patent
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Mar 7, 2000
Issued Date -
N/A
app pub date -
Nov 8, 1996
filing date -
Nov 22, 1993
priority date (Note) -
Expired
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Abstract
A semiconductor device includes a semiconductor chip, and a multi-layered member connected to the semiconductor chip. The multi-layered member includes one or a plurality of wiring layers and one or a plurality of insulating layers alternately stacked. The one or the plurality of insulating layers have holes. The multi-layered member has electrode parts which include deformed portions of the above one or the plurality of wiring layers obtained by deforming the above one or the plurality of wiring layers via said holes.
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