TTL input stage for negative supply systems
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United States of America Patent
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Feb 29, 2000
Grant Date -
N/A
app pub date -
May 11, 1998
filing date -
May 11, 1998
priority date (Note) -
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Abstract
A TTL input stage for negative supply voltage systems is described herein which obviates the need for a positive supply and a level shifter. In one embodiment, a first JFET current source, the emitter/collector of a PNP bipolar transistor, and a second JFET current source are connected in series between a control input and a negative supply voltage. The base of the bipolar transistor is connected to ground. At a control input of 2V.sub.be above ground, the PNP transistor has a V.sub.be drop across its emitter/base junction, and each of the identical JFETs has a V.sub.be drop across it. An NPN bipolar transistor, having its base connected to the source of the second JFET and its emitter connected to the negative voltage, is turned on by the V.sub.be drop across the second JFET to provide the output of the TTL input stage. In one embodiment, the TTL input stage is a control circuit for turning an output MOSFET on and off. A circuit providing hysteresis of the threshold for switching between logic levels may be included as part of the TTL input stage.
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