CMOS semiconductor devices and method of formation
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United States of America Patent
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Feb 22, 2000
Grant Date -
N/A
app pub date -
Jun 30, 1998
filing date -
Jun 30, 1998
priority date (Note) -
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Abstract
In one embodiment, a metal layer (18) is formed over a gate dielectric layer (14, 16) on a semiconductor substrate. A masking layer (20) is patterned to mask a portion of the metal layer (18). An exposed portion of the metal layer (18) is nitrided to form a conductive nitride layer (24). The masking layer (20) is removed and the conductive nitride layer (24) is patterned to form a first gate electrode (23) having a first work function value, and the conductive layer (18) is patterned to form a second gate electrode (25) having a second work function value which is different from that of the first work function value.
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